Flow Reaches Milestone: PPU Achieves End-to-End CPU Operations in Alpha Testing

14 May, 2025 – Helsinki – Flow Computing Oy - the pioneer in licensing on-die, ultra-high-performance parallel computing solutions to CPU vendors of all architectures - today announced it has successfully achieved a  critical milestone in Flow’s development roadmap towards commercializing its parallel processing ecosystem. 

Capable of increasing any CPU architecture by up to 100X, the company has been actively developing a compiler that enables source code to take advantage of its acclaimed Parallel Processing Unit (PPU) architecture - that compiler today entered Alpha testing. 

Through the first target compilations, it has been determined that simple parallel workloads consist of a massive amount of loops in RISC-V® CPU models without PPU assistance. 

Whereas in RISC-V CPU models incorporating the PPU, the amount of these loops is significantly reduced by recompiling the existing code, demonstrable proof that it is indeed possible to achieve a significant performance boost with a PPU-enhanced CPU design at up to 100X performance.

At its most elemental usage level, the compiler identifies parallel elements in the existing source code that can be effectively sped up by the PPU. Code is analyzed by the compiler to identify what parts can be enhanced by PPU acceleration - the compiler then assigns parallelizable functionality directly to the PPU, bypassing CPU bottlenecks to achieve improved performance over the baseline CPU architecture. 

In summary, Flow has now achieved full end-to-end operation by being able to compile high-level programs into extended RISC-V binaries and executing them in its gem5-based simulator modeling PPU integrated into the RISC-V CPU system.

This critical milestone in the company’s product development roadmap means the full commercialization of its Parallel Processing Unit (PPU) architecture is on schedule for the next critical milestone, which is the completion of the next set of PPU Performance Modeling over the coming months.

About gem5

gem5 is widely used in various companies, particularly in the domains of processor design, academic research, and embedded systems. gem5 is an open-source simulator that supports many architectures, including RISC-V, and many organizations leverage it for research, development, and performance analysis of custom processor designs. Companies adopting gem5 include: AMD®, ARM®, Google®, Intel®,, Qualcomm®, SiFive® and many others.

About the PPU

The next generation CPU performance improvement is achieved through PPU that are integrated on-die through a license from Flow (similar in scope to an ARM® core license). Simply replacing some CPU cores with PPUs will - out-of-the-box - boost performance by 2X, all achieved with zero changes to any software source code.

This huge performance boost is independent of the used CPU instruction set (ARM, RISC-V, x86, IBM® Power®, etc.) to enable next generation CPU throughput. PPU performance scales linearly - the more PPU cores that are integrated on-die, the higher the performance boost that will be subsequently gained. PPU is parametric and can thus be easily-integrated across every major tier of the CPU market - from wearables, to mobile devices, to PCs, and even all the way up to servers/cloud and supercomputers. 

Flow’s combination of PPU technology is also complementary in nature to the entirety of the devices - while PPU boosts the CPU, all other connected units (such as matrix units, vector units, NPUs and GPUs) holistically benefit from the performance of PPU and obtaining a major boost from the now far-more-capable CPU.

Quotes

“What we have amply demonstrated in this early development phase is that simple parallel workloads cause massive loops in CPUs without PPU enhancement - whereas in CPUs with PPUs, those loops are significantly reduced (if not practically eliminated),” said Dr. Martti Forsell, CTO, Chief Architect and co-founder of Flow Computing. “What was an unexpected and positive surprise to our engineers - in their first testing of the PPU architecture integrated into the RISC-V CPU model - was that the software had optimal code quality.” 

Timo Valtonen, CEO and co-founder continued, noting: “Achieving this end-to-end milestone represents a significant step forward in PPU product maturity, readiness for the market and that our bold claims are neither theoretical or empty marketing. We are very optimistic that Flow’s rapid technical achievement will further solidify the industry’s confidence in the promise of PPU and that we can implement and achieve our targets as promised.”

About Flow Computing

Flow Computing is a pioneering startup based in Helsinki, Finland enabling the next generation of CPU performance for the most demanding applications and has been named one of the top 10 Finnish tech startups of 2025. This revolutionary performance leap is achieved using the company’s patented Parallel Processing Unit (PPU) licensable architecture and compiler ecosystem - enabling developers to choose their preferred ratio of raw performance for new apps vs. maintaining legacy code and application compatibility when required. Flow's groundbreaking architecture also turbocharges CPUs for embedded systems and data centers for uses such as edge and cloud computing, AI clouds, autonomous vehicle systems, military-grade computing and more. Learn more at www.flow-computing.com. 

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Read the official press release:
Flow Computing Reaches Milestone in Commercializing PPU Technology

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